Testable design of microprocessors and other VLSI

The goal of this thesis is to design procedures for testing microprocessors and other VLSI based on their functional description (e.g., register transfer description) and instruction sets. The complete test is divided into three distinct phases: verification of the control functions, verification of the data-manipulation functions and verification of the input-output functions. The first and last of these are dealt with here. To verify control, appropriate additional signala inside the chip are used and made observable at the terminal pins of the microprocessor chip. Complete instruction sequences executed in a test mode then serve to verify the control functions. Procedures for doing this are given and also for verifying data transfer. The procedures for generating these test patterns can be used in the user environment on the basis of information in the user's manuals. The test-generation procedures for the input-output operations use state-table descriptions and are based on combining several theoritical results from the existing literature. The test-generation procedures were applied in a number of case studies and encouraging results were obtained.